Abstract

This paper motivates the use of domain-specific abstract machines for designing hardware accelerators. Specifically, we describe how we built a reconfigurable dataflow accelerator for sparse tensor algebra, a relatively complex domain, using the Sparse Abstract Machine (SAM). We show that leveraging an abstract dataflow representation (and its compiler) lead to a slew of benefits, including computational generality within the application domain, easier verification and debugging, boosted design productivity, and decoupled development of the toolchain from the hardware design and generation. These benefits allowed us to build the accelerator within a short time-frame with only two designers.

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BibTeX

@article{hsu2023,
  title={Designing a Dataflow Hardware Accelerator with an Abstract Machine},
  author={Olivia Hsu and Maxwell Strange and Kunle Olukotun and Mark Horowitz and Fredrik Kjolstad},
  journal={Workshop on Languages, Tools, and Techniques for Accelerator Design (LATTE) co-located with ASPLOS 2023},
  year={2023},
  month={March}
}